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贝尔的题
作者：佚名 来源：不详 发布时间：2007-4-27 15:18:00
partI
1.Why is non-linear quantization method adopted in A/D transformation?
A) To reduce quantization errors
B) Because most of signals are non-linear
C) Both A and B
D) Neither A or B
2. About digital signal:
A) It is discrete in tim domain
B) It has a limited number of values
C) Both A and B
D) Neither A or B
3 In order to restore the digital original signal, the sampling frequency
F has the following constrains:
A) F<=2Fs
B) F>=2Fs
C) F>Fs
D) F<Fs
4.the procedure of digitalization has the following seqence:
A) Sampling,quantization,coding
B) Sampling,coding,quatization
C) Quatization,coding,sampling
D) coding,quantization,sampling
5 the purpose of coding is
A) To improve SNR provided the bit rate is constant
B) To minimise bit rate proivided the constant SNR is given
C) Both A and B
D) Neither A or B
6 At present time is PCM communication ,the sampling freqency to
speech signals is
A) 4k
B) 8k
c) 16k
d) 20k
7 In HDLC frame ,synchronous code is
A) 01111110
B) 01110010
C) 11110000
D) 10101010
8 A multiframe of 30/32 channel PCM is made up of 16 consecutive frames.
the time length of such a multiframe is
A) 2ms
B) 1ms
C) 250us
D) 125us
9 the network synchronous mode adoped in the digital commucation network in
china
is
A) Quasistable synchronous mode
B) Master-Slave mode
C) Master-Slave mode combined with quasistable synchronous mode
D) Mutual synchronous mode
10 About the advantage of using digital switch and tansmission instead of an
alogue ons,
with one is wrong
A) Economy
B) Reliability
C) Save of bandwith
D) Improved transmission quality
E) Integration of speech and data transmission
Part II
Make a judgement True or False
1. Parity code can both check and correct errors
2. In 30/32 channel PCM frame struct, every frame transmits frame
synchronous code in TS0(first time slot)
3. The analogue subscriber speech signals are transmitted and
received via 2 bi-directional wires ,but the digital ones via 4
one-directional wires
4.A distributed swicth system has higer reliability and security than
a central control
5.cmm is capacity maturity model
Part III
1.请写出中断执行一般流程
2 下面是一些基本的数字电路问题，简要回答
1）什么是setup和holdup 时间
2）什么是竞争和冒险现象，怎么判断，如何消除
3） 什么是同步逻辑和异步逻辑
4） 你知道哪些常用的逻辑电平，TTL和CMOS电平可以直接互连么
5）什么是“线与”逻辑，要实现它，再硬件特性上又什么具体要求
6。。。。。
7）已给出基地址/cs0=F000H和16位地址线A[15:0],译出三个外设片选，其
地址为/cs1=F100H /cs2=F200H /cs3=F300H /表示低有效
3。请分别画出osi的参考模型和TCP/IP的参考模型
4。请列举通信行业中常用的不同体系构架的cpu种类，并举例说明
附加题
请谈谈你对SDH的理解
1）SDH相对PDH的特性差异
2）SDH中不同的低速等级数据速率的映射关系（请以STM-1为例）
3）请画出STM-1的帧结构图
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